1. Field of the Invention
The invention relates to a circuit arrangement for coding or decoding, comprising an installation for the formation of a number of check bits in dependence upon binary data or information which has a plurality of digit positions, and uses, a cyclic code, whereby, by means of a coder, an information polynomial is divided by a generator polynomial, and the remainder of the division is the result of the coding.
2. Description of the Prior Art
A circuit arrangement of this type is described in the book of J. Swoboda, "Coding for Error Correction and Error Recognition" at page 108.